Design and development of CCSDS based Telemetry Encoder on FPGA using VHDL, - open to bidding
$30-250 USD
Cancelled
Posted about 10 years ago
$30-250 USD
Paid on delivery
The project will comprise of three phases.
First phase will be the know how development of CCSDS Packet TM encoding Standard.
The second phase will be the implementation of all layers of standard on FPGA using the VHDL language. Each layer will be implemented as a separate module and simulation will be performed.
Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit.
Hello! If you have digital design projects I can help you right away! I have 8 years experience in designing digital logic circuits using VHDL and implementing them in FPGA. I was a digital design engineer at Grenoble Institute of Technology! Right now I am a teaching assistant at an important university in Europe. I teach the digital logic design and VHDL modules laboratories!
Have a nice day!