Verilog Model of Mips Pipeline

Hi I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. Please let me know your exact requirements, the price mentioned is negotiable according to your requirements. Thanks

I am currently designing MIPS pipeline and already done with single and multi cycle MIPS and RISC-V processors. I can show my work.