to develope Energy efficient algorithm for Multipath TCP operations (multipath tcp ie one link is for LTE and the other is Wi-Fi data should flow to and from in both link at the same time)
Design a small PCB (~20x25mm) around an bear-bone FPGA-chip (XC7A15T-1CPG236C) that is able to configure itself on every power-up from a flash memory that can be also found on the PCB. Also it is necessary to design a programming interface for the flash memory on the PCB as it should be possible to load the bitstream to the flash with an ESP32 module. Writing an XDC file and configuring protocol (...
I want someone who can help me to read the results data from FPGA board on MATLAB software. Verilog HDL language will be used.
I'm building a license plate detection system, and concept has been proven using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code
This is the project: FSM, saving data blocks received via RS-232 with fixed baud rate in external RAM and extracting necessary byte from arbitrary address (selected by slide-switches). - I need VHDL code and Testbench. -Explain its behavior and parts. I am using ZedBoard ZYNQ SOC training , Xilinx Zynq-7000
Hello, i want to create project using altera DE2-115 board to detect edges on 3 image using sobel filter and show they ober VGA 640x480. To choose which image should be apear is needed 2 swtich. i have done some algorithm with matlab and now i have to implement it on altera. Thanks
Fuzzy logic based fault detection
Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details.