3 questions on CMOS VLSI by using cadence application

Dear sir, I have Cadence on my PC and I have 1 year experience with it. I have completed 3 projects using Cadence Viruso. Might you please send me more details about your project?

I have well experienced in doing such kind of jobs.........................................................................

Hi, I am electronics engineer and have a very good understanding of VLSI. Feel free to inbox me the details of your task :)

hi, I am a senior digital design engineer, I have a wide knowledge in digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE and Quartise. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.

✔️ I am professionally experienced in Electronics Design, and working with verification tools like Cadence Virtuoso. My experience in Electronic Circuits is summarized in these projects : -Layout and verification. -LPF Design MOSFET amplifier Design. -Cascode amplifier Design. -Cascaded amplifier Design. -Differential amplifier Design. -Negative Feedback . -Current Mirrors. -OTA Design. -Fully-Differential Folded Cascode OTA . -gm/ID Design Methodology . -Two-Stage Miller OTA . -Constant-gm Bias Circuit, PVT Corners, and Monte Carlo Simulation. -Layout and Verification. -Designing an RF - FULL - project. -Designing TIA. -Designing VGA. -Designing Mixer. -LNA Design.

At first take my respect.I am a EEE ENGINEER backgrounder .I read your project description I understand what you want. I can do it and give you 100% good work. please leave me on massage on my chart box. Then we will discuss others and start working right now. https://www.freelancer.com/u/alamineee Gratefulness Al.A