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Port c code to Verilog (for FPGA)

$10-50 USD

Completed
Posted about 5 years ago

$10-50 USD

Paid on delivery
This project consists to port some c code (around 50 lines) to Verilog in order to run on a FPGA. Output of the contest Verilog .v source file equivalent of verilog.c testbench .v file equivalent to doSimulation() You can run the C code with "gcc main.c && ./[login to view URL]" Elements to select the winning bidder: - Partial screenshot of the implementation or snipset of the implementation - Any ideas, comments, remarks how to get the best implementation - How MIN2 and MAX2 is implemented - Approximate number of LUTs of the module - If a Lattice Diamond project is provided for the simulation. I use Lattice which is freely available at [login to view URL] (including the simulator) - The code has been tested on a simulator (required) - The code has been tested on a FPGA (optional) - CV and resume of the bidder
Project ID: 18837089

About the project

5 proposals
Remote project
Active 5 yrs ago

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I'm an experience hardware developer in the SF bay area. Worked on low level firmware programming using C and also have extended simulation and bringup experience coding in Verilog. Work daily on running simulations and estimating hardware cost and getting hardware to be cost efficient and working. A good communicator that strives to deliver on time, on budget.
$50 USD in 3 days
0.0 (0 reviews)
2.7
2.7
5 freelancers are bidding on average $58 USD for this job
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Dear sir I have more than 10 years experience in digital design using verilog please check my profile also please message me so that we can discuss Best regards
$55 USD in 1 day
4.9 (418 reviews)
7.8
7.8
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Hello, I can do your project. Is it still open? Please confirm so I get started as per your specifications.
$50 USD in 3 days
5.0 (2 reviews)
2.0
2.0
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Hi guy, I have five years experience on FPGA design. And I have strong skill with verilog coding. So, I think I can fit this project. Thanks, Vu
$45 USD in 10 days
0.0 (0 reviews)
0.0
0.0
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Hi, I have experience in HDL coding. I can do your project in Verilog. Kindly consider my profile. Thanks
$88 USD in 7 days
0.0 (0 reviews)
0.0
0.0

About the client

Flag of UNITED STATES
Palo Alto, United States
5.0
24
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Member since Feb 16, 2002

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