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need a VHDL expert asap

$10-30 AUD

Closed
Posted about 6 years ago

$10-30 AUD

Paid on delivery
vhdl expert needed asap to run a code
Project ID: 16042366

About the project

15 proposals
Remote project
Active 6 yrs ago

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15 freelancers are bidding on average $25 AUD for this job
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I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. Relevant Skills and Experience FPGA/VHDL/Verilog Proposed Milestones $20 AUD - the whole task
$20 AUD in 1 day
4.9 (89 reviews)
6.4
6.4
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A proposal has not yet been provided
$30 AUD in 1 day
5.0 (76 reviews)
5.5
5.5
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Hi, I am good in VHDL and verilog. Please elaborate your requirement to proceed further. Regards, Chhanda Relevant Skills and Experience I have more than 7 years experience in FPGA and PLD field. I worked in ISE, vivado, quartus, lattice diamond. Proposed Milestones $30 AUD - Share the corrected code
$30 AUD in 1 day
5.0 (17 reviews)
5.0
5.0
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A proposal has not yet been provided
$30 AUD in 3 days
4.8 (16 reviews)
4.8
4.8
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Not for Money ! Only for Good Feedback to Increase the rating . Relevant Skills and Experience VHDL , Verilog Proposed Milestones $15 AUD - complition
$15 AUD in 1 day
4.8 (18 reviews)
4.5
4.5
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I have more than 10 years of experience in the FPGA/ASIC design. I think I can help you
$30 AUD in 1 day
5.0 (10 reviews)
3.9
3.9
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A proposal has not yet been provided
$20 AUD in 2 days
4.6 (15 reviews)
4.2
4.2
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HI Sir i have experience in VHDL and VLSI. Come to chat to discuss i am confident i can complete this job. waiting for your reply thanks Relevant Skills and Experience Electrical Engineering, Electronics, Engineering, FPGA, Verilog / VHDL Proposed Milestones $25 AUD - project
$25 AUD in 1 day
5.0 (3 reviews)
2.2
2.2
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A proposal has not yet been provided
$30 AUD in 2 days
0.0 (0 reviews)
0.0
0.0
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A proposal has not yet been provided
$25 AUD in 1 day
0.0 (0 reviews)
0.0
0.0
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I have expertise in ASIC Design flow, HDL(Verilog,VHDL,System Verilog), Digital Deisgn with 4+ yrs of experience. Relevant Skills and Experience I have expertise in ASIC Design flow, HDL(Verilog,VHDL,System Verilog), Digital Deisgn, Processor Design, Verification(UVM) and have a Masters degree from a premier university. Proposed Milestones $20 AUD - Complete
$20 AUD in 1 day
0.0 (0 reviews)
0.0
0.0
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A proposal has not yet been provided
$25 AUD in 15 days
0.0 (0 reviews)
0.0
0.0

About the client

Flag of SRI LANKA
Colombo 15, Sri Lanka
4.9
18
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Member since Dec 11, 2017

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