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    1,833 vhdl project vhdl project jobs found, pricing in USD

    Implementation of Fractional order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please.

    $168 (Avg Bid)
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    3 bids

    I need a simple VHDL program for measuring the time between two input signals. The VHDL program should be in structural code and should includes modules like Counter, BCDtoASCI, UART and FStateMachine + top level. I need also for every module and for the hole program testbenches.

    $176 (Avg Bid)
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    11 bids

    FPGA implementation of Fractional Order function using VHDL, by using descrete function and any approximation methods.

    $291 (Avg Bid)
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    13 bids

    Hey, I have working project in simulation that when I try to run it on board it doesn't work. I need someone with that board or that have familiar board to notice if there is problem with my code.

    $178 (Avg Bid)
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    This includes the development of vhdl code for PWM generator, PID controller, flux estimator etc. Training would be web based on Skype or webex.

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    It is required to design a 4-bit binary divider. The division can be limited to un-signed numbers only. Feel free to implement the divider by any architecture you like, but be sure to understand and be able to verify the operation of the selected architecture. Fig. 1 shows a binary division example to recap the binary division process. -Structural and behavioral codes for the binary divider using...

    $40 (Avg Bid)
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    12 bids

    I Have mips in VHDL code, I want to add to it UART

    $35 (Avg Bid)
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    5 bids

    I got MIPS in VHDL, but when I run it on FPGA, It seems to do nothing, although it's working in simulation.

    $37 (Avg Bid)
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    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    $67 (Avg Bid)
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    Design a multifunction wristwatch that has time-keeping, alarm, and stopwatch functions. The wristwatch has three buttons (B1, B2, and B3) that are used to change the mode, set the time, set the alarm, start and stop the stopwatch, and so on. Pushing button B1 changes the mode from Time to Alarm to Stopwatch and back to Time. The functions of other buttons vary depending on the mode.

    $51 (Avg Bid)
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    RTL design project All of the data required to explain what I want are found in the attached file

    $115 (Avg Bid)
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    1 bids

    I will provide all parameters and specifications for this project. I will also provide code for finding prime number so you just need to develop mips coding files in VHDL

    $182 (Avg Bid)
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    8 bids

    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    $8 (Avg Bid)
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    1 bids

    Anyone who is good in VHDL and can help me in implementing load, move, add, xor

    $2 / hr (Avg Bid)
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    1 bids

    Design a circuit that emulates an alarm system, which is armed and disarmed with a code consisting of 4 symbols given by the buttons on the board (for example btnC, btnL, btnR, btnU). The alarm is armed or disarmed when the correct code combination is entered. When the alarm is disarmed, LED0 is on, when the alarm is armed, LED15 is on. SW0 is a sensor, when the alarm is armed and SW0 = 1, the LED...

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    18 bids

    I need a vhdl project that integrates IoT and communications.

    $212 (Avg Bid)
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    3 bids

    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    $65 (Avg Bid)
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    8 bids

    I need single cycle 32 bit mips vhdl coding to find prime numbers. I will provide code to find prime number so you just have to build cpu for this specific purpose and I am also going to provide parameters for this architecture. I am gonna share project file after finalising with best person to do this job

    $153 (Avg Bid)
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    We need a Verilog/VHDL developer to write some simple blocks for the Virtex-7 FPGA. The development environment is Xilinx Vivado. There are 5 blocks in total with the following functionalities: 1. CM Memory: Write a wrapper for the Xilinx xpm_memory to fit our bus requirements and testbench. 2. RDM Memory: Write a wrapper for the Xilinx xpm_memory to fit our bus requirements and test...

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    I'm a electronic engineer and I have a good command on computer programs and also on digital programming like VHDL.

    $21 / hr (Avg Bid)
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    You have to write code and report for this .

    $16 (Avg Bid)
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    I have the scheme of the project need only to work with the basys 3. Only to use buttons and switches from the basys3. Need the whole code in VHDL for Vivado.

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    Develop a 32‐bit single or multi‐cycle CPU capable of performing a search for prime numbers.    CPU

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    Has to be completed by the end of tomorrow (13/05/2019) Create VHDL code for chess clock, uploaded the task as a file.

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    3 bids

    freelancer required for small project. must know FPGA programming/VHDL/Verilog

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    Some work related to fpga and vhdl. Need any expert who can manage that

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    I have 2 schemes. One with neuron and with genetic algorithm. I need to combine both to train this neuron via genetic algo. Using VHDL in ISE design suite 14.7. Here is [login to view URL] picture of two symbols that I want to combine(gen - genetic algorithm with build in neuron process, neur4sigm - neuron with sigmoid func). I need to train this neuron with this alforithm. You can modify inputs t...

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    Want to be able to use accelerometer data on microblaze softcore processor, need SPI driver and interface on VHDL

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    Hi, We have to make a report & VHDL coding with simulation. Please bid who are expert from an electrical engineering background. After that, we would discuss more details. Please give your best quote & we would make long term relationship with the perfect electrical engineering freelancer. Thanks.

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    Hello, I'm currently working on a project that I am struggling with due to lack of VHDL experience. Want to create an SPI driver and interface it with a Microblaze softcore processor and the on-board accelerometer (ADXL362) so that the processor can read the accelerometer data.

    $258 (Avg Bid)
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    14 bids

    I need you to develop some VHDL software for me. Message for further details

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    I need you to develop some VHDL software for me. Contact me for more details

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    I have some simple VHDL tasks. My deadline is tomorrow. 1. Suggest a structural and behavioral description of a bidirectional cyclic shift register. 2. Suggest a structural and behavioral description of a bidirectional arithmetic shift register. Use parallel generation operators and configuration options. 3. Create a subroutine that performs the conversion between the integer and bit_vector types....

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    VHDL and FPGA system details via PM

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    VHDL and FPGA system using vivado program.

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    I need you to develop some VHDL software for me. Must have good VHDL background. Message me for more details. Thank You.

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    5 bids

    I need a vhdl task done along with report

    $30 (Avg Bid)
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    Looking for a Vivado Studio Specialist to evaluate code. On a Zturn board ( Xilinx Soc 7000 Series.) Skills required: AXI RTL Vhdl Vivado Studio

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    2 bids

    You have to complete coding and report writing

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    I need a block to select some outputs based on the input and previous values of the input in VHDL

    $30 (Avg Bid)
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    6 bids

    Product suggestions for a high volume/high demand (tens of thousands to hundreds of thousands) FPGA based consumer product using A3P series FPGA from Microsemi. Product must be easy-intermediate difficulty to design Verilog/VHDL and final manufacturing cost in $30-$50 [login to view URL] as little other electronic components as possible. There is a possibility of design collaboration for winning e...

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    Guaranteed
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    8 entries

    Hi, We have to make a report & VHDL coding with simulation. Please bid who are expert from electrical engineering background. After that, we would discuss more details. Please give your best quote & we would make long term relation with the perfect electrical engineering freelancer. I need to hire 3 freelancers for 3 copies of the task. Thanks.

    $126 (Avg Bid)
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    7 bids

    I need a random number generator which will work on a fpga board and the code should be written in xilinx, should be a vhdl code

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    I have the Deo Nano Soc and I want to read data using DMA. I need to read at a rate of about 2MB/s. I have used VHDL for a while and if you could provide some protocol/instructions at the top level, I could do the rest.

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    VHDL Project with registers for small business.

    $90 (Avg Bid)
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    Starting a small business programming registers, buttons, and switches on my FPGA board in VHDL. Looking to hire a programmer that knows basic/simple vhdl coding skills and can complete the startup within a few days preferably.

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    Hi I'm looking for a good vhdl programmer to help me with a code. I'm supposed to bring in a simple logo, then i,m supposed to be able to display the logo on the center of a screen(using a vga connection) and my name on the bottom left corner while being able to flip the logo with a button on my fpga board the deadline is thursday. thank you. I have the initial codes. I'll provide m...

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    I need you to develop some software for me. I would like this software to be developed for Windows using Verilog/VHDL.

    $10 - $30
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    Need to know the knowledge of Blockchain algorithm and FPGA programming(VHDL/Verilog), C++ programming. Will discuss more via interview.

    $1008 (Avg Bid)
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    16 bids